g0
hex 0C			// clear screen

strln	MICROTEL VTX-202
strln	Telidon Terminal
strln
strln	TEST: COLOR CAPABILITY
strln	Draw rectangles of the 64 colors
strln	possible with one-byte operand format.
strln
strln	2015 Sep

g1

// blue 0
setp 0 80

color 0 0 0
rectf +12 +12
color 1 0 0
rectf +12 +12
color 2 0 0
rectf +12 +12
color 3 0 0
rectf +12 +12

setpr -48 -12
color 0 1 0
rectf +12 +12
color 1 1 0
rectf +12 +12
color 2 1 0
rectf +12 +12
color 3 1 0
rectf +12 +12

setpr -48 -12
color 0 2 0
rectf +12 +12
color 1 2 0
rectf +12 +12
color 2 2 0
rectf +12 +12
color 3 2 0
rectf +12 +12

setpr -48 -12
color 0 3 0
rectf +12 +12
color 1 3 0
rectf +12 +12
color 2 3 0
rectf +12 +12
color 3 3 0
rectf +12 +12

// blue 1
setpr +12 +36

color 0 0 1
rectf +12 +12
color 1 0 1
rectf +12 +12
color 2 0 1
rectf +12 +12
color 3 0 1
rectf +12 +12

setpr -48 -12
color 0 1 1
rectf +12 +12
color 1 1 1
rectf +12 +12
color 2 1 1
rectf +12 +12
color 3 1 1
rectf +12 +12

setpr -48 -12
color 0 2 1
rectf +12 +12
color 1 2 1
rectf +12 +12
color 2 2 1
rectf +12 +12
color 3 2 1
rectf +12 +12

setpr -48 -12
color 0 3 1
rectf +12 +12
color 1 3 1
rectf +12 +12
color 2 3 1
rectf +12 +12
color 3 3 1
rectf +12 +12

// blue 2
setpr +12 +36

color 0 0 2
rectf +12 +12
color 1 0 2
rectf +12 +12
color 2 0 2
rectf +12 +12
color 3 0 2
rectf +12 +12

setpr -48 -12
color 0 1 2
rectf +12 +12
color 1 1 2
rectf +12 +12
color 2 1 2
rectf +12 +12
color 3 1 2
rectf +12 +12

setpr -48 -12
color 0 2 2
rectf +12 +12
color 1 2 2
rectf +12 +12
color 2 2 2
rectf +12 +12
color 3 2 2
rectf +12 +12

setpr -48 -12
color 0 3 2
rectf +12 +12
color 1 3 2
rectf +12 +12
color 2 3 2
rectf +12 +12
color 3 3 2
rectf +12 +12

// blue 3
setpr +12 +36

color 0 0 3
rectf +12 +12
color 1 0 3
rectf +12 +12
color 2 0 3
rectf +12 +12
color 3 0 3
rectf +12 +12

setpr -48 -12
color 0 1 3
rectf +12 +12
color 1 1 3
rectf +12 +12
color 2 1 3
rectf +12 +12
color 3 1 3
rectf +12 +12

setpr -48 -12
color 0 2 3
rectf +12 +12
color 1 2 3
rectf +12 +12
color 2 2 3
rectf +12 +12
color 3 2 3
rectf +12 +12

setpr -48 -12
color 0 3 3
rectf +12 +12
color 1 3 3
rectf +12 +12
color 2 3 3
rectf +12 +12
color 3 3 3
rectf +12 +12

g0


//---------------------------------------------------------------------
// Encoding of above:

0000: 0F 0C 4D 49 43 52 4F 54 45 4C 20 56 54 58 2D 32  ..MICROTEL VTX-2
0010: 30 32 0D 0A 54 65 6C 69 64 6F 6E 20 54 65 72 6D  02..Telidon Term
0020: 69 6E 61 6C 0D 0A 0D 0A 54 45 53 54 3A 20 43 4F  inal....TEST: CO
0030: 4C 4F 52 20 43 41 50 41 42 49 4C 49 54 59 0D 0A  LOR CAPABILITY..
0040: 44 72 61 77 20 72 65 63 74 61 6E 67 6C 65 73 20  Draw rectangles 
0050: 6F 66 20 74 68 65 20 36 34 20 63 6F 6C 6F 72 73  of the 64 colors
0060: 0D 0A 70 6F 73 73 69 62 6C 65 20 77 69 74 68 20  ..possible with 
0070: 6F 6E 65 2D 62 79 74 65 20 6F 70 65 72 61 6E 64  one-byte operand
0080: 20 66 6F 72 6D 61 74 2E 0D 0A 0D 0A 32 30 31 35   format.....2015
0090: 20 53 65 70 0D 0A 0E 24 41 42 40 3C 40 31 40 49   Sep...$AB@<@1@I
00A0: 64 3C 42 31 40 49 64 3C 50 31 40 49 64 3C 52 31  d<B1@Id<P1@Id<R1
00B0: 40 49 64 25 7F 56 44 3C 44 31 40 49 64 3C 46 31  @Id%.VD<D1@Id<F1
00C0: 40 49 64 3C 54 31 40 49 64 3C 56 31 40 49 64 25  @Id<T1@Id<V1@Id%
00D0: 7F 56 44 3C 60 31 40 49 64 3C 62 31 40 49 64 3C  .VD<`1@Id<b1@Id<
00E0: 70 31 40 49 64 3C 72 31 40 49 64 25 7F 56 44 3C  p1@Id<r1@Id%.VD<
00F0: 64 31 40 49 64 3C 66 31 40 49 64 3C 74 31 40 49  d1@Id<f1@Id<t1@I
0100: 64 3C 76 31 40 49 64 25 40 4C 64 3C 41 31 40 49  d<v1@Id%@Ld<A1@I
0110: 64 3C 43 31 40 49 64 3C 51 31 40 49 64 3C 53 31  d<C1@Id<Q1@Id<S1
0120: 40 49 64 25 7F 56 44 3C 45 31 40 49 64 3C 47 31  @Id%.VD<E1@Id<G1
0130: 40 49 64 3C 55 31 40 49 64 3C 57 31 40 49 64 25  @Id<U1@Id<W1@Id%
0140: 7F 56 44 3C 61 31 40 49 64 3C 63 31 40 49 64 3C  .VD<a1@Id<c1@Id<
0150: 71 31 40 49 64 3C 73 31 40 49 64 25 7F 56 44 3C  q1@Id<s1@Id%.VD<
0160: 65 31 40 49 64 3C 67 31 40 49 64 3C 75 31 40 49  e1@Id<g1@Id<u1@I
0170: 64 3C 77 31 40 49 64 25 40 4C 64 3C 48 31 40 49  d<w1@Id%@Ld<H1@I
0180: 64 3C 4A 31 40 49 64 3C 58 31 40 49 64 3C 5A 31  d<J1@Id<X1@Id<Z1
0190: 40 49 64 25 7F 56 44 3C 4C 31 40 49 64 3C 4E 31  @Id%.VD<L1@Id<N1
01A0: 40 49 64 3C 5C 31 40 49 64 3C 5E 31 40 49 64 25  @Id<\1@Id<^1@Id%
01B0: 7F 56 44 3C 68 31 40 49 64 3C 6A 31 40 49 64 3C  .VD<h1@Id<j1@Id<
01C0: 78 31 40 49 64 3C 7A 31 40 49 64 25 7F 56 44 3C  x1@Id<z1@Id%.VD<
01D0: 6C 31 40 49 64 3C 6E 31 40 49 64 3C 7C 31 40 49  l1@Id<n1@Id<|1@I
01E0: 64 3C 7E 31 40 49 64 25 40 4C 64 3C 49 31 40 49  d<~1@Id%@Ld<I1@I
01F0: 64 3C 4B 31 40 49 64 3C 59 31 40 49 64 3C 5B 31  d<K1@Id<Y1@Id<[1
0200: 40 49 64 25 7F 56 44 3C 4D 31 40 49 64 3C 4F 31  @Id%.VD<M1@Id<O1
0210: 40 49 64 3C 5D 31 40 49 64 3C 5F 31 40 49 64 25  @Id<]1@Id<_1@Id%
0220: 7F 56 44 3C 69 31 40 49 64 3C 6B 31 40 49 64 3C  .VD<i1@Id<k1@Id<
0230: 79 31 40 49 64 3C 7B 31 40 49 64 25 7F 56 44 3C  y1@Id<{1@Id%.VD<
0240: 6D 31 40 49 64 3C 6F 31 40 49 64 3C 7D 31 40 49  m1@Id<o1@Id<}1@I
0250: 64 3C 7F 31 40 49 64 0F                          d<.1@Id.