Early
Electronic
Calculator		 TEAL abc-800 Calculator

Manufacturer: TEAL
Model: abc-800
Year: 1971
Form: Desktop
Functions: Basic four
Number of Digits: 12
Display Type: NIXIE
Display:Matsushita CD78
Logic Technology: DIS,SSI,MSI
Memory Technology: MSI-MOS
Diodes: 348
Transistors: 34
Principal ICs: JMOS (µPD100,..)
IC Complement:NEC µPD10A (3), NEC µPD11A (1), NEC µPD13C (9), µPD16A (1), NEC µPD101C (3), NEC µPD112C (1), Mitsubishi M5811 (2), Mitsubishi M5812 (3), M5823 (2)
(25 total)
Tech. Data Level: 3
Tech. Data Source: RE
Tech. Data Pages: 15
Tech. Data:Schematic (pdf)

This model is an OEM product from TEAL (Tokyo Electronic Application Laboratory).

The abc-800 and TEAL-designed Riccar share the same case, differing in the presence of an accumulating memory function in the Riccar. The abc-800 and the TEAL-designed Royal Digital I share a nearly identical logic design, differing in the display type and number of digits (abc-800:nixie/12, RDI:flourescent/10). Presumably the abc-800 was slightly earlier and the design adapted to produce the Royal Digital I.

(Possession of J.Ongena.)

Notes:


Main logic board with registers and state machine.
Timing and display board.
ID Plate on rear.

- Unit Log -

Serial Number: 81877
Year of Manufacture: 1971~ (estimate based on other TEAL designs)
Date of Receipt: Correspondance with Jef Ongena / 2021 Oct.
Source: Unit owned by J.O. Physical repairs by J.O.
State upon Receipt: Good physical condition. Division problem.
Current State: Fully functional (2022 Mar).

Date: 2022 Mar
Symptoms: Division fails to resolve all the digits of the quotient. E.g.: 10 000 000 000 / 7 = 14 rather than 1 428 571 428.
Analysis: PLT observed to not be taking in as many marks as it should. Clock signal at UF3.8 (ΦC for PLT µPD11) found to be varying with temperature. Problem source traced back through clocking logic to DF69. DF69 is leaky.

Explanation: During ST4, UE8.3 should be pulled LOW through the 200K R, but the leaky DF69 is allowing it to be pulled HIGH through diodes DF64 & DF65, with the leakiness getting worse over some milliseconds once reverse-bias voltage is applied, and varying with temperature. With UE8.3 HIGH, ΦD11 is enabled to suppress a digit-clock of the PLT, so the PLT retains it's position and a new mark is not injected. The missing marks then cause the division primary loop to exit early.

Solution: DF69 replaced.

Date: 2022 Mar
Procedure: During analysis of division problem, the clock phases were noted to have minimal-to-zero guard periods between them. Carbon-composition 50K Rb resistors for drivers measured to have drifted up to ~ 65K. Two resistors replaced.


  TEAL abc-800
Calculators | Integrated Circuits | Displays | Simulations
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