An online simulation of Simon is presented here. The simulation contains several pre-loaded programs ready to run. User-written programs may also be run in the simulation.

Using the Simulation

Getting Started

The simplest way to use the simulation is to run one of the pre-installed programs:

1. Ensure the POWER switch is OFF.
2. Select a program by double-clicking on a program title on the PROGRAM LIST page. A tape of the program is loaded into the Simon paper tape reader.
3. Click the POWER switch to ON to begin execution.

Help is provided within the simulation in the form of roll-over descriptions of the various switches and elements.

Importing Programs

A user-written program may be supplied to the simulation using the IMPORT button on the CURRENT PROGRAM page. Such programs must be in assembly format, the simulation will assemble them into paper-tape format.

The program data must be copied into your system clipboard before pressing the IMPORT button. Pressing the IMPORT button will bring up a security alert notification from one's browser, as the browser must have permission from the user to obtain the program data from the system clipboard.

(The assembled program can be exported to the clipboard by clicking shift-IMPORT.)

Idiosyncrasies

Note that the simulation reflects many of the idiosyncrasies of a physical implementation and it is possible for the simulation to end up in a state where it exhibits odd behaviour. Of note, certain actions can result in the instruction execution cycle being out of sync with the instruction alignment on tape. In such situations it is best to turn the power switch off and reload the tape. Cycling the power switch effectively resets the machine.

Algorithms

This simulation is based on the Simon2006E design, simulated at the level of logical equations for all the relays. The entire set of equations is evaluated at each clock step. For example, following is the equation for one bit of the ALU:

CR5_1 =  ( (not Ø5 or not ER11) and CR5_1 )
      or (     Ø8 and ER11
           and (    (     ( not IR2_1 and not IR1_2 and not IR1_1 )
                      and (    ( not CY_1 and ((    CR1_1 and not CR2_1) or (not CR1_1 and CR2_1)) )
                            or (     CY_1 and ((not CR1_1 and not CR2_1) or (    CR1_1 and CR2_1)) )
                          )
                    )
                 or ( (not IR2_1 and not IR1_2 and     IR1_1) and ( (not CY_1 and CR1_1) or (CY_1 and not CR1_1) ) )
                 or ( (not IR2_1 and     IR1_2 and     IR1_1) and ( (not CR3_1 and CR1_1) or (CR3_1 and CR2_1)   ) )
                 or ( (    IR2_1 and not IR1_2 and not IR1_1) and ( CR1_1 and CR2_1                              ) )
                 or ( (    IR2_1 and not IR1_2 and     IR1_1) and ( not CR1_1                                    ) )
                 or ( (    IR2_1 and     IR1_2 and not IR1_1) and ( CR1_1 or CR2_1                               ) )
               )
         )