| HP 9830 | HP 9830 ALU ROM Functional Listing |
This is the output of a spreadsheet simulation of the 9830 ALU ROMs. As with the microcode listing, the contents were extracted from the patent as graphics, OCR'd to text, inserted in a spreadsheet, and formatted into a functional presentation with spreadsheet cell functions.
The ROM data presented in the patent needed to be inverted to achieve the correct function results. The patent data is probably the 'burn list' for making the ROMs, that is, it marks the bits which are to be set to zero.
The binary ALU functions of ROM 1 are presented in the Binary table. The 8 address lines are set out in positive-logic form. The first four fields are the function selection, BCD is fixed at 0 for the binary operations. T1 is a spurious signal for purposes of the binary functions, as can be seen in the table the datasets for T1=0 and T1=1 are identical. RBUS, SBUS and BC are the 3 data inputs. The ROM address (shown in decimal) is composed from these with some inversions dictated by the hardware.
| ALU Binary ROM Functional Listing | ||
|---|---|---|
Funct'n Inputs ROM Out
------- ------------------------------- --------- -------
BCD AC2 AC1 AC0 T1 BC RBUS SBUS ADDR DATA TBUS BC
A7 A6 A3 A4 A5 nA2 nA1 nA0 DEC 3210
======= === === === === == == ==== ==== ==== ==== ==== ==
XOR 0 0 0 0 0 0 0 0 7 111 0 1
0 0 0 0 0 0 0 1 6 1111 1 1
0 0 0 0 0 0 1 0 5 1111 1 1
0 0 0 0 0 0 1 1 4 111 0 1
0 0 0 0 0 1 0 0 3 111 0 1
0 0 0 0 0 1 0 1 2 1111 1 1
0 0 0 0 0 1 1 0 1 1111 1 1
0 0 0 0 0 1 1 1 0 111 0 1
0 0 0 0 1 0 0 0 39 111 0 1
0 0 0 0 1 0 0 1 38 1111 1 1
0 0 0 0 1 0 1 0 37 1111 1 1
0 0 0 0 1 0 1 1 36 111 0 1
0 0 0 0 1 1 0 0 35 111 0 1
0 0 0 0 1 1 0 1 34 1111 1 1
0 0 0 0 1 1 1 0 33 1111 1 1
0 0 0 0 1 1 1 1 32 111 0 1
---------------------------------------------------------
AND 0 0 0 1 0 0 0 0 23 111 0 1
0 0 0 1 0 0 0 1 22 111 0 1
0 0 0 1 0 0 1 0 21 111 0 1
0 0 0 1 0 0 1 1 20 1111 1 1
0 0 0 1 0 1 0 0 19 111 0 1
0 0 0 1 0 1 0 1 18 111 0 1
0 0 0 1 0 1 1 0 17 111 0 1
0 0 0 1 0 1 1 1 16 1111 1 1
0 0 0 1 1 0 0 0 55 111 0 1
0 0 0 1 1 0 0 1 54 111 0 1
0 0 0 1 1 0 1 0 53 111 0 1
0 0 0 1 1 0 1 1 52 1111 1 1
0 0 0 1 1 1 0 0 51 111 0 1
0 0 0 1 1 1 0 1 50 111 0 1
0 0 0 1 1 1 1 0 49 111 0 1
0 0 0 1 1 1 1 1 48 1111 1 1
---------------------------------------------------------
IOR 0 0 1 0 0 0 0 0 15 111 0 1
0 0 1 0 0 0 0 1 14 1111 1 1
0 0 1 0 0 0 1 0 13 1111 1 1
0 0 1 0 0 0 1 1 12 1111 1 1
0 0 1 0 0 1 0 0 11 111 0 1
0 0 1 0 0 1 0 1 10 1111 1 1
0 0 1 0 0 1 1 0 9 1111 1 1
0 0 1 0 0 1 1 1 8 1111 1 1
0 0 1 0 1 0 0 0 47 111 0 1
0 0 1 0 1 0 0 1 46 1111 1 1
0 0 1 0 1 0 1 0 45 1111 1 1
0 0 1 0 1 0 1 1 44 1111 1 1
0 0 1 0 1 1 0 0 43 111 0 1
0 0 1 0 1 1 0 1 42 1111 1 1
0 0 1 0 1 1 1 0 41 1111 1 1
0 0 1 0 1 1 1 1 40 1111 1 1
---------------------------------------------------------
ZTT 0 0 1 1 0 0 0 0 31 111 0 1
0 0 1 1 0 0 0 1 30 111 0 1
0 0 1 1 0 0 1 0 29 111 0 1
0 0 1 1 0 0 1 1 28 111 0 1
0 0 1 1 0 1 0 0 27 111 0 1
0 0 1 1 0 1 0 1 26 111 0 1
0 0 1 1 0 1 1 0 25 111 0 1
0 0 1 1 0 1 1 1 24 111 0 1
0 0 1 1 1 0 0 0 63 111 0 1
0 0 1 1 1 0 0 1 62 111 0 1
0 0 1 1 1 0 1 0 61 111 0 1
0 0 1 1 1 0 1 1 60 111 0 1
0 0 1 1 1 1 0 0 59 111 0 1
0 0 1 1 1 1 0 1 58 111 0 1
0 0 1 1 1 1 1 0 57 111 0 1
0 0 1 1 1 1 1 1 56 111 0 1
|
Funct'n Inputs ROM Out
------- ------------------------------- --------- -------
BCD AC2 AC1 AC0 T1 BC RBUS SBUS ADDR DATA TBUS BC
A7 A6 A3 A4 A5 nA2 nA1 nA0 DEC 3210
======= === === === === == == ==== ==== ==== ==== ==== ==
ZTT.CBC 0 1 0 0 0 0 0 0 71 11 0 0
0 1 0 0 0 0 0 1 70 11 0 0
0 1 0 0 0 0 1 0 69 11 0 0
0 1 0 0 0 0 1 1 68 11 0 0
0 1 0 0 0 1 0 0 67 11 0 0
0 1 0 0 0 1 0 1 66 11 0 0
0 1 0 0 0 1 1 0 65 11 0 0
0 1 0 0 0 1 1 1 64 11 0 0
0 1 0 0 1 0 0 0 103 11 0 0
0 1 0 0 1 0 0 1 102 11 0 0
0 1 0 0 1 0 1 0 101 11 0 0
0 1 0 0 1 0 1 1 100 11 0 0
0 1 0 0 1 1 0 0 99 11 0 0
0 1 0 0 1 1 0 1 98 11 0 0
0 1 0 0 1 1 1 0 97 11 0 0
0 1 0 0 1 1 1 1 96 11 0 0
---------------------------------------------------------
IOR.CBC 0 1 0 1 0 0 0 0 87 11 0 0
0 1 0 1 0 0 0 1 86 1011 1 0
0 1 0 1 0 0 1 0 85 1011 1 0
0 1 0 1 0 0 1 1 84 1011 1 0
0 1 0 1 0 1 0 0 83 11 0 0
0 1 0 1 0 1 0 1 82 1011 1 0
0 1 0 1 0 1 1 0 81 1011 1 0
0 1 0 1 0 1 1 1 80 1011 1 0
0 1 0 1 1 0 0 0 119 11 0 0
0 1 0 1 1 0 0 1 118 1011 1 0
0 1 0 1 1 0 1 0 117 1011 1 0
0 1 0 1 1 0 1 1 116 1011 1 0
0 1 0 1 1 1 0 0 115 11 0 0
0 1 0 1 1 1 0 1 114 1011 1 0
0 1 0 1 1 1 1 0 113 1011 1 0
0 1 0 1 1 1 1 1 112 1011 1 0
---------------------------------------------------------
IOR.SBC 0 1 1 0 0 0 0 0 79 111 0 1
0 1 1 0 0 0 0 1 78 1111 1 1
0 1 1 0 0 0 1 0 77 1111 1 1
0 1 1 0 0 0 1 1 76 1111 1 1
0 1 1 0 0 1 0 0 75 111 0 1
0 1 1 0 0 1 0 1 74 1111 1 1
0 1 1 0 0 1 1 0 73 1111 1 1
0 1 1 0 0 1 1 1 72 1111 1 1
0 1 1 0 1 0 0 0 111 111 0 1
0 1 1 0 1 0 0 1 110 1111 1 1
0 1 1 0 1 0 1 0 109 1111 1 1
0 1 1 0 1 0 1 1 108 1111 1 1
0 1 1 0 1 1 0 0 107 111 0 1
0 1 1 0 1 1 0 1 106 1111 1 1
0 1 1 0 1 1 1 0 105 1111 1 1
0 1 1 0 1 1 1 1 104 1111 1 1
---------------------------------------------------------
ADD 0 1 1 1 0 0 0 0 95 11 0 0
0 1 1 1 0 0 0 1 94 1011 1 0
0 1 1 1 0 0 1 0 93 1011 1 0
0 1 1 1 0 0 1 1 92 111 0 1
0 1 1 1 0 1 0 0 91 1011 1 0
0 1 1 1 0 1 0 1 90 111 0 1
0 1 1 1 0 1 1 0 89 111 0 1
0 1 1 1 0 1 1 1 88 1111 1 1
0 1 1 1 1 0 0 0 127 11 0 0
0 1 1 1 1 0 0 1 126 1011 1 0
0 1 1 1 1 0 1 0 125 1011 1 0
0 1 1 1 1 0 1 1 124 111 0 1
0 1 1 1 1 1 0 0 123 1011 1 0
0 1 1 1 1 1 0 1 122 111 0 1
0 1 1 1 1 1 1 0 121 111 0 1
0 1 1 1 1 1 1 1 120 1111 1 1
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HP 9830 |
bhilpert 2013 Oct |