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The arithmetic unit is a 4-bit parallel adder/subtracter with BCD sum correction. Three inputs control the primary function performed as per table 1. A carry flag is incorporated for carry between digits and additional logic permits a carry to be injected for several reasons: incrementing or decrementing a register's decimal point position, incrementing or decrementing a register digit, and incrementing the program counter. Additional inputs permit disabling of the sum correction so that base-16 data (the decimal point position and program instructions) will not be corrected.
Table 1: Arithmetic Unit Functions | |||
CARNOBC | CARNOA | nCARSUB | Function |
0 | 0 | 0 | W=A-B-C |
0 | 0 | 1 | W=A+B+C |
0 | 1 | 0 | - |
0 | 1 | 1 | W=B+C |
1 | 0 | 0 | W=A |
1 | 0 | 1 | W=A |
1 | 1 | 0 | W=0 |
1 | 1 | 1 | W=0 |
The BCD sum correction is performed by some additional combinatorial logic placed at the outputs of the 4-bit parallel adder/subtracter and which adjust the outputs before they leave the arithmetic unit. Table 2 shows the corrections performed. Blank entries in the table are situations that do not occur for the given function.
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Architecture |
Electronics |
Arithmetic |
Timing |
T States |
States |
Procedures |
Numeral-Entry
Casio AL-1000 Technical Description EEC |
bhilpert Nov 2004 |